/**
 @file sys_usw_register.h

 @date 2009-11-3

 @version v2.0

Macro, data structure for system common operations

*/

#ifndef _SYS_USW_REGISTER
#define _SYS_USW_REGISTER
#ifdef __cplusplus
extern "C" {
#endif

#include "sal.h"
#include "ctc_register.h"
#include "ctc_spool.h"
#include "sys_usw_chip.h"
#include "sys_usw_wb_common.h"
#include "ctc_const.h"

enum sys_register_tcat_prof_e
{
    SYS_TRUNCATION_PROFILE_RSV_DIS        = 0,       /*normal disable profile*/

    SYS_TRUNCATION_PROFILE_USER_START     = 1,
    SYS_TRUNCATION_PROFILE_USER_END       = 15,
    SYS_TRUNCATION_PROFILE_MAX 
};
typedef enum sys_register_tcat_prof_e sys_register_tcat_prof_t;

typedef int32 (* sys_wb_sync_fn)(uint8 lchip,uint32 appid);

struct sys_register_cethertype_s
{
    uint16 ether_type;
    uint8  rsv1[2];
    uint32 calc_len[0];
    ctc_spool_index_t index;
};
typedef struct sys_register_cethertype_s sys_register_cethertype_t;

struct sys_register_master_s
{
    sys_wb_sync_fn wb_sync_cb[CTC_FEATURE_MAX];
    sal_timer_t* wb_timer;
    sal_systime_t* wb_last_time;
    ctc_spool_t*        cethertype_spool;      /* Share pool save cEtherType */
    sal_mutex_t*        register_mutex;        /**< mutex for register */

    uint32              wb_interval;
    uint32              logic_rep_threshold;

    uint32              qmsg_info_type:8;
    uint32              opf_type_cethertype:6;   /*range:0~63*/
    uint32              wb_timer_en:1;
    uint32              tpoam_vpws_coexist:1;

    uint32              xgpon_en            :1;
    uint32              gint_en             :1;
    uint32              int_en              :1;
    uint32              derive_mode         :3;
    uint32              flow_record_en      :1;
    uint32              sid_edit_mode       :1;
    
    uint32              wb_keep_knet:1;
    uint32              station_move_mode:1;
    uint32              rsv:6;

    uint8               wb_entries[CTC_FEATURE_MAX];
};
typedef struct sys_register_master_s sys_register_master_t;

extern sys_register_master_t *p_usw_register_master[CTC_MAX_LOCAL_CHIP_NUM_PP];

struct  sys_dump_db_traverse_param_s
{
   uint8 lchip;
   void* value0;
   void* value1;
   void* value2;
   void* value3;
   void* value4;
};
typedef struct sys_dump_db_traverse_param_s sys_dump_db_traverse_param_t;


#define SYS_USW_GET_DERIVE_MODE (p_usw_register_master[lchip]->derive_mode)
#ifdef WARMBOOT
#define SYS_USW_REGISTER_WB_SYNC_EN(lchip, mod_id, sub_id, enable)\
{\
    if(CTC_WB_DM_MODE(lchip) && mod_id < CTC_FEATURE_MAX)\
    {\
        ctc_wb_set_sync_bmp(lchip, mod_id, sub_id,enable);\
        sys_usw_register_wb_updata_time(lchip, mod_id,enable);\
    }\
}
#else
#define SYS_USW_REGISTER_WB_SYNC_EN(lchip, mod_id, sub_id, enable)
#endif

#define SYS_USW_REGISTER_MIN_LOGIC_THRD  2
#define SYS_USW_REGISTER_MAX_LOGIC_THRD  8192

extern int32
sys_usw_global_ctl_set(uint8 lchip, ctc_global_control_type_t type, void* value);

extern int32
sys_usw_global_ctl_get(uint8 lchip, ctc_global_control_type_t type, void* value);

extern int32
sys_usw_lkup_ttl_index(uint8 lchip, uint8 ttl, uint32* ttl_index);

extern int32
sys_usw_lkup_ttl_value(uint8 lchip, uint8 ttl_index, uint8* ttl);

extern int32
sys_usw_lkup_adjust_len_index(uint8 lchip, uint8 adjust_len, uint8* len_index);

extern int32
sys_usw_lkup_ttl(uint8 lchip, uint8 ttl_index, uint32* ttl);

extern int32
sys_usw_register_init(uint8 lchip);

extern int32
sys_usw_wb_sync_register_cb(uint8 lchip, uint8 module,uint8 entries, sys_wb_sync_fn fn);

extern int32
sys_usw_dump_db_register_cb(uint8 lchip, uint8 module, CTC_DUMP_MASTER_FUNC fn);

/* mode 0: txThrd0=3, txThrd1=4; mode 1: txThrd0=5, txThrd1=11; if cut through enable, default use mode 1 */
/* Mode 1 can avoid CRC, but will increase latency. Mode 0 can reduce latency, but lead to CRC. */
extern int32
sys_usw_net_tx_threshold_cfg(uint8 lchip, uint16 mode);

extern int32
sys_usw_global_set_chip_capability(uint8 lchip, ctc_global_capability_type_t type, uint32 value);

/*for acl module*/
extern int32
sys_usw_get_glb_acl_property(uint8 lchip, ctc_global_acl_property_t* pacl_property, uint8 inner);
extern int32
sys_usw_set_glb_acl_property(uint8 lchip, ctc_global_acl_property_t* pacl_property, uint8 inner);

extern int32
sys_usw_register_deinit(uint8 lchip);

extern int32
sys_usw_global_set_logic_destport_en(uint8 lchip, uint8 enable);

extern int32
sys_usw_global_get_logic_destport_en(uint8 lchip, uint8* enable);

extern int32
sys_usw_global_set_gint_en(uint8 lchip, uint8 enable);

extern int32
sys_usw_global_get_gint_en(uint8 lchip, uint8* enable);

extern int32
sys_usw_global_set_xgpon_en(uint8 lchip, uint8 enable, uint8 mode);

extern int32
sys_usw_global_get_station_move_mode(uint8 lchip, uint8* enable);

extern int32
sys_usw_global_get_xgpon_en(uint8 lchip, uint8* enable);

extern int32
sys_usw_register_add_compress_ether_type(uint8 lchip, uint16 new_ether_type, uint16 old_ether_type,uint8* o_cether_type, uint8* o_cether_type_index);

extern int32
sys_usw_register_remove_compress_ether_type(uint8 lchip, uint8 ether_type_index);

extern int32
sys_usw_register_get_truncation_profile_id(uint8 lchip, uint32 length, uint8 size, uint8* profile_id);

extern int32
sys_usw_global_set_int_en(uint8 lchip, uint8 enable);

extern int32
sys_usw_global_get_int_en(uint8 lchip, uint8* enable);

extern int32
sys_usw_global_failover_en(uint8 lchip, uint32 enable);

extern void
sys_usw_register_wb_updata_time(uint8 lchip,uint8 mod_id, uint8 enable);

extern int32
sys_usw_register_wb_sync_timer_en(uint8 lchip, uint8 enable);

extern void
ctc_wb_set_sync_bmp(uint8 lchip, uint8 mod_id, uint8 sub_id,uint8 enable);

extern const char*
sys_usw_register_get_reason_desc(uint8 lchip, uint16 reason_id);

extern int32
sys_usw_global_get_flow_record_en(uint8 lchip, uint8 * enable);

void
sys_usw_register_wb_sync_all(uint8 lchip);

#ifdef __cplusplus
}
#endif

#endif

